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GALVANTECH, INC. ASYNCHRONOUS SRAM
FEATURES
* * * * * * * * * * * Fast access times: 10, 12, 15and 20ns Fast OE# access times: 5, 6, 7 and 8ns Single +3.3V +0.3V power supply Fully static -- no clock or timing strobes necessary All inputs and outputs are TTL-compatible Three state outputs Center power and ground pins for greater noise immunity Easy memory expansion with CE# and OE# options Automatic CE# power down High-performance, low-power consumption, CMOS double-poly, double-metal process Packaged in 44-pin, 400-mil SOJ and 44-pin, 400-mil TSOP
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
256K x 16 SRAM
+3.3V SUPPLY REVOLUTIONARY PINOUT
GENERAL DESCRIPTION
The GVT73256A16 is organized as a 262,144 x 16 SRAM using a four-transistor memory cell with a high performance, silicon gate, low-power CMOS process. Galvantech SRAMs are fabricated using double-layer polysilicon, double-layer metal technology. This device offers center power and ground pins for improved performance and noise immunity. Static design eliminates the need for external clocks or timing strobes. For increased system flexibility and eliminating bus contention problems, this device offers chip enable (CE#), separate byte enable controls (BLE# and BHE#) and output enable (OE#) with this organization. The device offers a low power standby mode when chip is not selected. This allows system designers to meet low standby power requirements.
OPTIONS
* Timing 10ns access 12ns access 15ns access 20ns access Packages 44-pin SOJ (400 mil) 44-pin TSOP (400 mil) Power consumption Standard Low Temperature Commercial Industrial
MARKING
-10 -12 -15 -20
PIN ASSIGNMENT 44-Pin SOJ 44-Pin TSOP
A0 A1 A2 A3 A4 CE# DQ1 DQ2 DQ3 DQ4 VCC VSS DQ5 DQ6 DQ7 DQ8 WE# A5 A6 A7 A8 A9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
*
J TS
*
None L
* *
None I
(0C to 70C) (-40C to 85C)
*
A17 A16 A15 OE# BHE# BLE# DQ16 DQ15 DQ14 DQ13 VSS VCC DQ12 DQ11 DQ10 DQ9 NC A14 A13 A12 A11 A10
Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051 Tel (408) 566-0688 Fax (408) 566-0699
Rev. 3/98
Galvantech, Inc. reserves the right to change products or specifications without notice.
GALVANTECH, INC.
FUNCTIONAL BLOCK DIAGRAM
VCC VSS
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
BLE#
A0
DQ1
ROW DECODER
I/O CONTROL
ADDRESS BUFFER
MEMORY ARRAY 512 ROWS X 512 X 16 COLUMNS
DQ8
DQ9
DQ16
A17
COLUMN DECODER
POWER DOWN
CE# BHE# WE# OE#
March 20, 1998
2
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
TRUTH TABLE
MODE LOW BYTE READ (DQ1-DQ8) HIGH BYTE READ (DQ9-DQ16) WORD READ (DQ1-DQ16) LOW BYTE WRITE (DQ1-DQ8) HIGH BYTE WRITE (DQ9-DQ16) WORD WRITE (DQ1-DQ16) OUTPUT DISABLE STANDBY CE# L L L L L L L L H WE# H H H L L L X H X
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
OE# L L L X X X X H X
BLE# L H L L H L H X X
BHE# H L L H L L H X X
DQ1DQ8 Q HIGH-Z Q D HIGH-Z D HIGH-Z HIGH-Z HIGH-Z
DQ9DQ16 HIGH-Z Q Q HIGH-Z D D HIGH-Z HIGH-Z HIGH-Z
POWER ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE STANDBY
PIN DESCRIPTIONS
SOJ & TSOP Pin Numbers
1, 2, 3, 4, 5, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 42, 43, 44 17 6
SYMBOL
A0-A17
TYPE
Input
DESCRIPTION
Addresses Inputs: These inputs determine which cell is addressed.
WE# CE#
Input
Write Enable: This input determines if the cycle is a READ or WRITE cycle. WE# is LOW for a WRITE cycle and HIGH for a READ cycle. Chip Enable: This active LOW input is used to enable the device. When CE# is LOW, the chip is selected. When CE# is HIGH, the chip is disabled and automatically goes into standby power mode. Byte Enable: These active LOW inputs allow individual bytes to be written or read. When BLE# is LOW, the data is written to or read from the lower byte (DQ1-DQ8). When BHE# is LOW, the data is written to or read from the higher byte (DQ9-DQ16).
Input
39, 40
BLE#, BHE#
Input
41 7, 8, 9, 10, 13, 14, 15, 16, 29, 30, 31, 32, 35, 36, 37, 38 11, 33 12, 34
OE# DQ1-DQ16
Input Output Enable: This active LOW input enables the output drivers. Input/Output SRAM Data I/O: Data inputs and data outputs. Lower byte is DQ1-DQ8 and upper byte is DQ9-DQ16. Supply Supply Power Supply: 3.3V +0.3V% Ground
VCC VSS
March 20, 1998
3
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC Supply Relative to VSS........-0.5V to +4.6V VIN ..........................................................-0.5V to VCC+0.5V Storage Temperature (plastic) ..........................-55oC to +125o Junction Temperature .....................................................+125o Power Dissipation ...........................................................1.0W Short Circuit Output Current .......................................50mA
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
(All Temperature Ranges; VCC = 3.3V +0.3V unless otherwise noted)
DESCRIPTION
Input High (Logic 1) voltage Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Supply Voltage 0V < VIN < VCC Output(s) disabled, 0V < VOUT < VCC IOH = -4.0mA IOL = 8.0mA
CONDITIONS
SYMBOL
VIH VIl ILI ILO VOH VOL VCC
MIN
2.2 -0.5 -5 -5 2.4
MAX
VCC+0.5 0.8 5 5
UNITS
V V uA uA V
NOTES
1, 2 1, 2
1 1 1
0.4 3.0 3.6
V V
DESCRIPTION
Power Supply Current: Operating TTL Standby CMOS Standby
CONDITIONS
Device selected; CE# < VIL; VCC =MAX; f=fMAX; outputs open CE# >VIH; VCC = MAX; f=fMAX CE1# >VCC -0.2; VCC = MAX; all other inputs < VSS +0.2 or >VCC -0.2; all inputs static; f= 0
SYM
Icc ISB1 ISB2
TYP
110 30 0.1
POWER
-10
250 230 80 70 10 3
-12
220 200 70 60 10 3
-15
195 175 60 50 10 3
-20
155 135 50 40 10 3
UNITS NOTES mA mA mA 3, 14 14 14
standard low standard low standard low
CAPACITANCE
DESCRIPTION
Input Capacitance Input/Output Capacitance (DQ)
CONDITIONS
TA = 25oC; f = 1 MHz VCC = 3.3V
SYMBOL
CI CI/O
MAX
6 8
UNITS
pF pF
NOTES
4 4
March 20, 1998
4
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
AC ELECTRICAL CHARACTERISTICS
(Note 5) (All Temperature Ranges; VCC = 3.3V
DESCRIPTION
READ Cycle READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Output Enable access time Output Enable to output in Low-Z Output Enable to output in High-Z Byte Enable access time Byte Enable to output in Low-Z Byte disable to output in High-Z Chip Enable to power-up time Chip disable to power-down time WRITE Cycle WRITE cycle time Chip Enable to end of write Address valid to end of write, with OE# HIGH Address setup time Address hold from end of write WRITE pulse width WRITE pulse width, with OE# HIGH Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z Byte Enable to end of write
tWC tCW tAW tAS tAH tWP2 tWP1 tDS tDH tLZWE tHZWE tBW tRC tAA tACE tOH tLZCE tHZCE tAOE tLZOE tHZOE tABE tLZBE tHZBE tPU tPD
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
+0.3V)
- 10 - 12
MIN MAX
- 15
MIN MAX
- 20
MIN MAN UNITS NOTES
SYM
MIN
MAX
10 10 10 4 4 5 5 0 5 6 0 5 0 10 10 8 8 0 0 10 8 5 0 3 5 8
12 12 12 4 4 6 6 0 6 7 0 6 0 12 12 8 8 0 0 10 8 6 0 4 6 8
15 15 15 4 4 7 7 0 7 8 0 7 0 15 15 9 9 0 0 11 9 7 0 5 7 9
20 20 20 4 4 8 8 0 8 9 0 8 0 20 20 10 10 0 0 12 10 8 0 5 8 10
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 4, 7 4, 6, 7 4, 7 4, 6, 7 4 4 4, 6 4, 7 4, 6, 7
March 20, 1998
5
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
AC TEST CONDITIONS Input pulse levels Input rise and fall times Input timing reference levels Output reference levels Output load 0V to 3.0V 1.5ns 1.5V 1.5V See Figures 1 and 2
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
OUTPUT LOADS
DQ Z0 = 50 50 Vt = 1.5V Fig. 1 OUTPUT LOAD EQUIVALENT 3.3v 317 DQ 351 5 pF 30 pF
Fig. 2 OUTPUT LOAD EQUIVALENT
NOTES
1. 2. 3. 4. 5. 6. 7. All voltages referenced to VSS (GND). Overshoot: Undershoot: VIH +6.0V for t tRC /2. VIL -2.0V for t tRC /2
8. 9.
WE# is HIGH for READ cycle. Device is continuously selected. Chip enable and output enables are held in their active state.
Icc is given with no output current. Icc increases with greater output loading and faster cycle times. This parameter is sampled. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. Output loading is specified with CL=5pF as in Fig. 2. Transition is measured +500mV from steady state voltage. At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE.
10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip Enable and Write Enable can initiate and terminate a WRITE cycle. 13. Capacitance derating applies to capacitance different from the load capacitance shown in Fig. 1. 14. Typical values are measured at 3.3V, 25oC and 20ns cycle time.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION
Vcc for Retention Data Data Retention Current CE# >VCC -0.2; all other inputs < VSS +0.2 or >VCC -0.2; all inputs static; f= 0 Vcc = 2V Vcc = 3V
CONDITIONS
SYMBOL
MIN
2
TYP
MAX
UNITS
V
NOTES
VDR ICCDR ICCDR tCDR tR
2 3 0
400 600
uA uA ns ns
13 13 4 4, 11
Chip Deselect to Data Retention Time Operation Recovery Time
tRC
March 20, 1998
6
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE
VCC
VIH VIL
3.0V
t
VDR
3.0V
tRC
CDR
CE#
READ CYCLE NO. 1(8, 9)
tRC
ADDR
tAA tOH
VALID
Q
PREVIOUS DATA VALID
READ CYCLE NO. 2(7, 8, 10, 12)
tRC
DATA VALID
CE#
tABE
tHZCE
BLE# BHE#
tAOE tLZOE tHZBE
OE#
tLZBE tACE tLZCE tHZOE
Q
HIGH Z
DATA VALID DON'T CARE UNDEFINED
March 20, 1998
7
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
WRITE CYCLE NO. 1(7, 12, 13) (Write Enable Controlled with Output Enable OE# active LOW))
t
WC
ADDR
t
AW
t
t
AH
CW
CE#
t
BW
BLE# BHE# WE#
tAS
tWP2
tDS
tDH
D
t
DATA VALID
HZWE
tLZWE
Q
HIGH Z
WRITE CYCLE NO. 2(12, 13) (Write Enable Controlled with Output Enable OE# inactive HIGH)
t WC
ADDR
tAW t t AH
CW
CE#
t BW
BLE# BHE#
t
AS
tWP1
WE#
tDS tDH
D Q
DATA VALID HIGH Z DON'T CARE UNDEFINED
March 20, 1998
8
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
WRITE CYCLE NO. 3(12, 13) (Chip Enable Controlled)
t WC
ADDR
t tAS
AW
tCW
t
AH
CE#
t BW
BLE# BHE#
t
WP1
WE#
tDS tDH
D
DATA VALID HIGH Z
DON'T CARE
Q
WRITE CYCLE NO. 4(12, 13) (Byte Enable Controlled)
t WC
ADDR
tAW tAS tBW t AH
BLE# BHE# CE#
t CW
tWP1
WE#
tDS tDH
D
DATA VALID HIGH Z
DON'T CARE
Q
March 20, 1998
9
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
Package Dimensions
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
44-pin 400 Mil Plastic SOJ (J)
1.129 (28.68) 1.123 (28.52)
.405 (10.29) .395 (10.03)
.445 (11.30) .435 (11.05)
PIN #1 INDEX
.050 (1.27) TYP
.148 (3.76) .138 (3.51)
.030 (0.76) MIN
SEATING PLANE .020 (0.51) .015 (0.38)
.095 (2.41) .080 (2.03) .380 (9.65) .360 (9.14)
Note: All dimensions in inches (millimeters)
MAX MIN
or typical, min where noted.
44-pin 400 Mil Plastic TSOP (TS)
.741 (18.81) .721 (18.31)
.402 (10.21) .398 (10.11)
.467 (11.86) .459 (11.66)
PIN #1 INDEX
.0315 (0.80) TYP .007 (0.18) .005 (0.12)
SEATING PLANE .018 (0.45) .010 (0.25) .032 (0.80) .047 (1.20) MAX .008 (0.20) .002 (0.05) .024 (0.60) .016 (0.40)
Note: All dimensions in inches (millimeters)
MAX MIN
or typical, max where noted.
March 20, 1998
10
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98
GALVANTECH, INC.
Ordering Information
GVT73256A16 REVOLUTIONARY PINOUT 256K X 16
GVT 73256A16 XX - XX X X
Galvantech Prefix Part Number Temperature (Blank = Commercial I = Industrial) Power (Blank= Standard, L= Low Power) Speed ( 10 = 10ns, 12 = 12ns 15 = 15ns, 20 = 20ns) Package (J = 400 mil SOJ, TS = TSOP TYPE II)
March 20, 1998
11
Galvantech, Inc. reserves the right to change products or specifications without notice.
Rev. 3/98

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